EDA Technology Experiment Kit - ZY11203E Specificaton & Trade Terms
Model | ZY11203E |
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Place Of Origin | China |
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Price Term | EX-Work |
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Payment Term | T/T |
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I. Product Features
EDA technology experiment kit is tightly close to such syllabus as EDA Technology, Programmable Logic Component Principle and Application and etc in colleges and universities. The experiment contents are abundant, which could fully meet requirements of experimental teaching on communication, electronic major’s EDA courses among colleges and universities.
(1) The product is specially identified by identification committee composed of experts, professors from Wuhan University, Huazhong University of Science and Technology, and etc. It is obtained well receiving and high comment of which the experiment kit could not only well meet experiment teaching of undergraduate and graduate, but also be the platform of electronic design competition and teacher R& D with such characteristics as abundant content, high technology, scalable hardware, and etc.
(2) Adopt structure of motherboard (basic experiment system) +adaptation board B(expansion board) +expansion board C (adaptation board), the configuration is flexible, application range is wide, therefore, users could choose different adaptation board and expansion board, according to their teaching requirements, so as to achieve optimum components configuration. 30000 FPGA is integrated on the motherboard, which could most experiments under the condition of not choosing any adaptation board and expansion board. The module covers the mainstream chips of companies, such as Altera, Lattice, Xilinx, and etc and there are altogether 9 to choose.
(3) High generality of programmable load, the motherboard system includes FPGA/ CPLD general programmable load module, which can be used for system programming download for almost all the CPLD/FPGA of internationally famous companies, such as Altera, Lattice, Xilinx, and etc support programming of different operating voltage CPLD/FPGA, and it can automatically recognize the chip on the host system without any wire jumper switching in the programming, safe, realizable, and is adaptive for users’ high density experiment operation.
(4) The experiment apparatus is an open platform. It not only opens all I/O port in the motherboard and adopt combination operation mode of wire and wireless, but also could realize composition of more complex and large experiment system among experiment boxes for cascade connection. Based on completing basic experiments, it also could process expansive development (could self-develop such modules as DSP, single-chip, CPLD/FPGA, and etc), and form different multiple experiments, such as motherboard+ CPLD/FPGA+ SCM, motherboard+ DSP+SCM, motherboard+ CPLD/FPGA+DSP, and etc.
(5) The experiment apparatus could complete all experiments under the two development environment, such as MAX+plusII, QuartusII, and users could choose by themselves.
(6) Such innovative modules, as communication expansion board and speech adaptation board, and etc, could open experiments on multi-speech and communication, which could be used for secondary development, course design and graduation design.
II. Performance Parameters
(1) AC, DC power supply
Input: AC 220V±10%
Output: +12V, -12V, +5V, +3.3V, +2.5V, 1.8V fixed; 1.25 V~12V adjustable
(2) Analog signal source
Output: square wave, sine wave, triangular wave
Amplitude: Vp-p 0~10V
(3) Digital signal source
Frequency output range: 1Hz~100MHz
Frequency output error: ≦±1%
(4) Host components
LD display module: a 122×32 LD
Digital tube display module: 8 digital tubes
A/D, D/A conversion module: A/D, D/A
LED display module: 16 LEDS
Digital adjustable signal source module: 1Hz~100MHz
Logic pen module: TTL level
EPC2 configuration module: an EPC2 power-down protection chip
4×4 keyboard module: 4×4 keyboard
Switch key press module: 16 dial-bit switches, 16 key press switches
Speaker module: with power amplifier
Core chip A (EP1K30QC208-2) module: one 30000 gates FPGA
(5) Adaptation board resources
A RS232 serial-port (SCM expansion board)
A VGA video interface (SCM expansion board)
A PS/2 keyboard interface (SCM expansion board)
A 16×16 matrix (matrix traffic light expansion board)
A transportation lamp (matrix traffic light expansion board)
(6) Experiment Apparatus Host Specification: 45cm×31cm×11cm
III. Experiment Contents
Host apparatus
(1) Familiarity and use of EDA software
(2) One-bit full adder design experiment
(3) Basic gate circuit series experiment
(4) Encoder series experiment
(5) Decoder series experiment
(6) Data comparator series experiment
(7) Data selector series experiment
(8) Parity checker series experiment
(9) Seven-input majority voter experiment
(10) Design of two-bit decimal cymometer experiment
(11) Basic trigger series experiment
(12) Digital tube display control series experiment
(13) Counter series experiment
(14) Register and latch series experiment
(15) Sequence signal generator experiment
(16) Four-bit multiplier based on LPM_ROM experiment
(17) One-bit heat code cycle encoder designed basing on waveform mode experiment
(18) Familiarity experiment of VHDL hardware description language
(19) VHDL model experiment of basic combinational logic circuit
a) Three-state buffer
b) Data selector
c) Decoder
d) Encoder
e) Comparator
f) Shifter
g) Full adder
h) Multiplier
(20) VHDL model experiment of basic sequence circuit
a) Latch
b) Trigger
c) Register
d) Counter
(21) Design experiment of Moore type finite state machine
(22) Design experiment of Mealy type finite state machine
(23) Eight-bit hardware adder experiment
(24) Eight-bit hardware multiplier experiment
(25) Digital clock experiment
(26) Cymometer experiment
(27) “Liang Shan-po and Zhu Ying-tai” music play design experiment
(28) D/A interface circuit and waveform generator design experiment
a) Sine wave generator experiment
b) Sawtooth and sweep signal source generator experiment
(29) High-speed A/D sampling controller design experiment
(30) ROM design experiment
(31) RAM design experiment
(32) FIFO design experiment
(33) Keyboard control circuit design experiment
(34) TTL ring oscillator experiment with RC
(35) Eight-input answer machine experiment
(36) LC display controller experiment (it is required to optionally equip LCD)
(37) Electronic lock experiment
Matrix traffic light expansion board (optional)
(38) Traffic light experiment
(39) Matrix display experiment
SCM expansion board (optional)
(40) PS/2 keyboard interface logic design experiment
(41) VGA display controller design experiment
a) Color bar signal generator design experiment
b) Chinese character/ image signal generator design experiment
(42) RS232 communication mode controlled electronic organ experiment
(43) PC computer, SCM, CPLD/FPGA mutual communication experiment
Communication expansion board (optional)
(44) Digital signal unit experiment
(45) Code-type conversion experiment
(46) Direct digital synthesis experiment
(47) Digital modulation and demodulation experiment
(48) Digital PLL and bit-synchronization extraction experiment
(49) QPSK modulation and demodulation experiment
(50) Descrambling code experiment
(51) Frame synchronization signal extraction experiment
(52) High-speed digital correlator design experiment
(53) Time-divider multiplexing experiment
(54) Error check experiment
Speech adaptation board (optional)
(55) Speech input and output experiment
(56) Digital record experiment